Can someone PLEASE show me how to represent the following formula in Audulus block form? I have made a programmatic HPF VST/AU module out of this code, but for the life of me, I cannot seem to wrap my head around the application of it using the VISIBLE BLOCK nodes in the library…I think maybe I’m just not a conceptual transformation person, or maybe I’m just too dumb lol. Either way, someone please help me…
I really envy your way to see through the murky depth of conceptual transformation, where I see just a big blur. I was like this for a long time with instantiators in the realm of OOP, but have recently come to understand (after 100 different ways of reading and thinking about) it when someone new explained it in a way I finally could wrap my head around.
Can you explain the logic of how that becomes what you made? I don’t understand what the values of a0 and a1 are supposed to be. I am trying to picture how all of this works. How would it look or what would the difference be if you used expression nodes? That is what I was trying to do, and getting lost. The addition and multiplication nodes are a little obscure for my brain, and so I try to avoid using them.
Take your time getting back to me. I am sure you have more important things going on than educating a DevOps engineer who should know how to translate programmatic logic into something more simplistic (seemingly, anyway). I know it’s Valentine’s Day and just cuz my date bailed on me doesn’t mean this stops being a romantic night out for everyone else. 
My sympathies for your unexpected solo evening. In the diagram you posted, the triangles represent gain nodes which are essentially just multiplications. The a0 and a1 inputs represent the gain of their respective node. Without further information I have no idea what the actual values are supposed to be. The diagram and code you posted don’t actually specify a value. The Sigma icon at the right side is a summing node which adds its inputs together. The diagram uses x(n) to represent the current sample and x(n-1) for the previous sample. They are both just values from the audio buffer. y(n) represents the output sample. For Audulus we can obtain the previous sample by using the unit delay node (z-1). So the diagram basically says, "Take the current sample multiplied by a0 and the previous sample multiplied by a1 and add them together to get the output.
The diagram represents a class of digital filter referred to as a FIR or finite impluse reponse filter. Since we only use the current and previous sample it is a first order filter. Assume for the moment that a0 and a1 are 0.5. You would end up with y(n) = x(n)/2 + x(n-1)/2. So you would be averaging the current sample and the one before to get the output sample. This averaging will smooth the output of the filter and reduce the higher frequencies. By adjusting the value of a0 and a1 you can adjust the amount of smoothing applied and therefore the frequency response. If a0 is 1 and a1 is 0 there will be no smoothing since y(n) will be x(n). Similarly if a0 is 0 and a1 is 1 you will again have no smoothing since the y(n) will be x(n-1) or the original waveform delayed by one sample. For the filter to have unity gain a0 + a1 = 1. The cutoff frequency will be lowest when a0 = a1 = 0.5.
This is not a particularly good filter design for most audio applications. Although it’s easy to implement, it has significant ripple in the passband. You would probably be better off using the built in low-pass node which is also a first order filter but uses a feedback design rather than a feed-forward one. You can Google FIR filters for more information if you can stand trying to plow through the math.
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Thanks so much for taking the time to write a detailed reply! I now have a good starting point for my growing understanding. Your time and patience is VERY much appreciated. You are a wizard of math and synthesis, @stschoen 
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Glad I could help. Every time I try to help someone else on the forum I learn something new myself. I was sort of familiar with moving-average filters but I didn’t realize how uneven their response was until I started looking on Google while I was answering your question. I have an engineering and computer science background but when I first started with Audulus I was a total beginner as far as audio DSP goes. Most of what I’ve learned has been through trying to answer questions that have come up on the forum, both mine and other’s. As they say, “We’re all in this together.”
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