Has anyone played with modules that use the rungler circuit? The Benjolin has a rungler circuit, but I actually got into the idea using (the excellent) Euroreakt collection for Reaktor.
I'd like to build/port one for Audulus but I'm not sure where to start. Thoughts?
Hey! This is Michael, creator of Euro Reakt. I only recently got into Audulus. If Audulus has a Turing Machine or Noisering emulation, that would be the best place to start.
The Turing Machine and Noisering both use an 8-bit analog shift register. The first bit of the shift register is filled with a noise sample whenever a clock is received. The last bit can be fed back to the first to create a looping melody. The 8 bits of the ASR run through a DAC-type algorithm (kind of a misnomer, since we're still digital).
With the Rungler algorithm, only 3 of the bits are used. With the Rungler, you typically have one oscillator as the clock source, while the other oscillator fills the current data bit. Then, the Rungler's output typically modulates one (or both) oscillators... in the Benjolin topology, the Rungler also modulates a filter.
There are at least two Runglers in Euro Reakt: the Rungler Oscillator and the Rungler (under sequencing I believe). The Rungler would be the best place to pull apart the algorithm, as it's pretty much just the ASR and 3-bit DAC.
@trickyflemming Does this shift register look right to you? I made it a while back after watching a video of Mark Verbos describing the shift register in the Random Sampling module. But I admit I don't know if this is specifically how it's supposed to be setup to work as a Rungler.
@RobertSyrett Yep! That looks correct. Each clock passes the current stage's voltage to the next stage while Stage 1 acquires a new sample. That solves the ASR part of the equation, although you need 8 stages for the Rungler, Turing Machine, and Noisering. Furthermore, that ASR needs to only store 0 or 1 and not any value in between (the quickest way to do this is to just put a comparator or rounding algorithm on the input).
Now, you need the DAC part of the equation. The easiest way to do this is to multiply each bit (ASR Stage) by powers of two. So, the first bit is multiplied by 1, the second bit is multiplied by 2, the third bit is multiplied by 4, and so on. After all of the bits are multiplied and summed, you divide the final integer by its maximum value to reduce the output range to 0.0-1.0.
For my version of the Rungler, you only take the last three most significant bits (if you're 1-indexing, those are bits 6, 7, and 8, which are respectively multiplied by 32, 64, and 128, summed, and divided by 255... but it doesn't actually matter which powers of two you use for those three since you divide at the end...). The 0-1.0 output of the division stage is your basic Rungler.
The fun part is taking that and use two oscillators as clock/data inputs. Connect the Rungler back into various oscillator parameters, and listen as chaos ensues.
Side note on efficiency: You could multiply the ASR stage outputs by pre-divided factors, i.e. 32/255, 64/255, 128/255... that way you could skip a whole division step per sample.
Ok, I think I followed what you were describing. I made an 8-bit register and a 3-bit register and a DAC as well as a DAC which is only the 32, 64, and 128. Perhaps you could improve the demo patch to make it sound crazier?
You guys are the flyest! Glad to see you here, Michael
I'm excited about Audulus, and with the release of Os's es-8, I think portable device integration is really gonna come into its own.
I mean, I'm walking around with an A10 processor in my pocket, so of course I want to immediately turn it into a modular synthesizer. I don't know about y'all... :)
Well I'm definitely starting to see the fun of this design. I added a resonant filter and some fluctuating random signals to mix and it makes for a fun krell-type of patch with more bits of repeating phrases.
edit: Adding this video because it explains the inspiration for the Rungler.
Sorry for the slow response! This patch is great. If you want more traditional Rungler behavior, you should disconnect the first five bits from the DAC and only keep the last three bits. You'll notice it becomes much more likely to get trapped in loops.
@trickyflemming Thanks! I cleaned it up a bit and made it into a proper module. I also added knobs for variability between all 8 bits to just the last three and a feedback knob (fully CW creates a loop) for creating chaotic sequences.